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DSP+FPGAĔ(sh)֞Vϵy(tng)
·Ҫܣ
·ͨ^ϵy(tng)TԽMX,Yɂ90͆SCеӼ݃xБTԿg\Ӷݔ·̖Լ·C̖ͬ̎Ɍɂ݃xݔ̖lʵIJɼӋ(sh)͞V̎,ϢĞVֵͨ^RS422ͨӍڰl(f)͵ӋC,ҪоƬTI TMS320F2812 DSPҪĹܞ飺 |
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- ·Ӌ(sh),
- ·ӷӋ(sh),
- Ӌ(sh)ݔ SINCOSݔ,
- Ӌ(sh)g,4lܣ
- Ӌ(sh)ݔlʸ_ 2MHz,
- 12·A/DDQ,
- ·x RS422ȫpͨӍͨ
- ÿ·Ӌ(sh)256 FIFO,
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DSP FirV·ùf
- Ӌ(sh)·ݔ,x4lӜpӋ(sh),
- Ӌ(sh)ɘӔ(sh)(j)MFIR+h(sh)֞V,
- RS4222·xȫpRS422ڡʿܛO,
- ض̖ݔ룺·ض̖ݔ,AD590ظнӿڣ
- ̖ݔ룺3·0~10V늉ݔ,
- (wn)l늉3·0~300V늉ӿ,
- Cӣ·-65V~+65V늉ӿڣ
- Ӌ(sh)ɘlʿܛOã1KHz,2KHz,3KHz4KHz,5KHz,6KHz7KHz,8KHz,9KHz10KHz,
- AD(sh)(j)ɘlʿ_2MHz,
- (sh)IO늸x,
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